1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a method of forming a pattern. Particularly, the present invention relates to a method of manufacturing a semiconductor device and a method of forming a pattern using a double-patterning method.
2. Description of the Related Art
In order to manufacture the semiconductor device, a fine fabrication process is performed by forming fine patterns or the like using a lithography technology.
In the aforementioned process, first, a resist film made of a photosensitive material is formed on the surface as a target of the micro-fabrication process. Then, a pattern image is transferred to the resist film by performing exposure. Subsequently, development is performed for the resist film where the pattern image is transferred to form a resist pattern from the resist film. In addition, a micro-patterning is performed, for example, by performing etching using the resist pattern as a mask.
In addition, ion implantation for implanting impurities onto the semiconductor layer and the like are performed using the aforementioned resist pattern as a mask.
In this process, the resist film is formed using a negative-type or positive-type resist material. For the negative-type resist material, a portion where the pattern image is transferred to the resist film is insolubilized against a developer. For the positive-type resist material, a portion where the pattern image is transferred to the resist film is solubilized to a developer.
In order to further miniaturize the semiconductor device, a double-patterning method was proposed (e.g., refer to Sungkoo Lee et al., “Double exposure technology using silicon containing materials,” SPIE2006 Vol. 6153 61531K-7 (2006), Mircea Dusa et al., “Pitch Doubling Through Dual Patterning Lithography Challenges in Integration and Litho Budgets,” SPIE2007 Vol. 6520 65200G-2 (2007), and Jo Finders et al., “Double patterning for 32 nm and below: an update,” SPIE2008 Vol. 6924 692408-12 (2008)).
In the double-patterning method, the resist pattern is formed by dividing into a plurality of layers, and a plurality of resist patterns are used as a mask during other processes such as etching.
For example, in the double-patterning method, a first layer of the resist pattern is formed with the same interval, and then, a processing target layer is patterned by performing an etching process using that resist pattern as a mask. Then, a second layer of the resist pattern is formed with the same interval such that the first layer of the resist pattern is shifted by a half cycle. Furthermore, etching is performed using that resist pattern as a mask. As a result, the pattern can be finely formed in an appropriate manner compared to a single patterning process.
In addition, a method of laminating a plurality of resist patterns was also proposed.
However, in this case, in order to form an overlying resist pattern on an underlying resist pattern, the underlying resist pattern may be dissolved by the solvent contained in the overlying resist material. In addition, the underlying resist pattern may be dissolved by the developer used to develop the overlying resist pattern. Therefore, it may be difficult to form the patterns with high accuracy.
In order to address such difficulties, a method of insolubilizing the underlying resist pattern before forming the overlying resist pattern was proposed (e.g., refer to JP-A-2007-310086, JP-A-2008-257170, JP-A-2009-015194, and JP-A-2008-281825.